무선 비디오 전송 RF 주파수 디지털 다운 컨버터 COFDM 전송 주파수 2.4G ~ 600Mhz 낮은 BDC

Digital Down Converter

Wireless Video Transmission RF Frequency Digital Down Converter COFDM Transfer frequency 2.4G to 600Mhz low

판매 포인트

1. Input frequencies from 24000 to 600MHz (Lower 1800Mhz)
2. 높은 대역폭
3. Low phase noise
4. High-frequency stability

사양

RF Frequency Range: 2400 MHz의
IF Frequency Range: 600 MHz의
Return Loss:-12 데시벨
Frequency Accuracy: ±10 ppm
이미지 거부: 60 dBc
평탄: ±0.5 dB (8MHz 대역폭)
Conversion Gain: 25 데시벨
Phase Noise (dBc/Hz)
dBc/Hz@1KHz ≤-80
dBc/Hz@10KHz ≤-90
dBc/Hz@100KHz ≤-100
공급 전압: 10~15V
Power Current: 100 엄마
Operating Temperature Range: +25 ℃

 

포트

RF IN: SMA-50K
IF OUT: SMA-50K
Power +12V: Stick
GND: Soldering lug

메모

1. The converter does not need to add a low-noise amplifier at the back end.
2. Actual Test: closed-loop test under the frequency of 2.4GHz/bandwidth 4MHz, the receiving sensitivity can reach -105dBm.
3. Input frequency supports 1~3GHz. (We can help customize).
4. Output frequency supports 300~700MHz. (We can support customize).

About the above video:

Our most popular products are wireless video transmitters and receivers. 하지만, some clients require modification of the transmission frequency to meet local legal demand, in which case the digital frequency up-down converter block comes in handy. One customer requested that we customize the RF frequency down converter for his 2.4G wireless video transmitter. So the input frequency is 2.4GHz, the output frequency is 600MHz, and the lowdown frequency is 1800MHz. We created the sample in accordance with his specifications. So I showed him a simple video that showed the 2.4G transmitter and 600Mhz receiver working correctly. If you have a similar requirement, such as 1-3G frequency input and 300-700Mhz output, please contact us for a custom solution.

 

What is DDC

In digital signal processing, a digital down-converter (DDC) converts a digitized, band-limited signal to a lower frequency signal at a lower sampling rate in order to simplify the subsequent radio stages. The process preserves all the information in the original signal less that which is lost to rounding errors in the mathematical processes. The input and output signals can be real or complex samples. Often the DDC converts from the raw radio frequency or intermediate frequency down to a complex baseband signal.

Architecture

A DDC consists of three subcomponents: a direct digital synthesizer (DDS), a low-pass filter (LPF), and a down sampler (which may be integrated into the low-pass filter). The DDS generates a complex sinusoid at the intermediate frequency (만약에). Multiplication of the intermediate frequency with the input signal creates images centered at the sum and difference frequency (which follows from the frequency-shifting properties of the Fourier transform). The low-pass filters pass the difference (즉. baseband) frequency while rejecting the sum frequency image, resulting in a complex baseband representation of the original signal. Assuming a judicious choice of IF and LPF bandwidth, the complex baseband signal is mathematically equivalent to the original signal. In its new form, it can readily be down-sampled and is more convenient to many DSP algorithms. Any suitable low-pass filter can be used including FIR, IIR, and CIC filters. The most common choice is an FIR filter for low amounts of decimation (less than ten) or a CIC filter followed by an FIR filter for larger down-sampling ratios.

Variations on the DDC

Several variations on the DDC are helpful, including many that input a feedback signal into the DDS. These include:

1. Decision-directed carrier recovery phase-locked loops in which the I and Q are compared to the nearest ideal constellation point of a PSK signal, and the resulting error signal is filtered and fed back into the DDS
2. A Costas loop in which the I and Q are multiplied and low pass filtered as part of a BPSK/QPSK carrier recovery loop

Implementation
DDCs are most commonly implemented in logic in field-programmable gate arrays or application-specific integrated circuits. While software implementations are also possible, operations in the DDS, multipliers, and input stages of the low-pass filters all run at the sampling rate of the input data. This data is commonly taken directly from analog to digital converters (ADCs) sampling at tens or hundreds of MHz. CORDIC is an alternative to the use of multipliers in the implementation of digital down converters.

Here is a client’s customized project, 1300~1400 Mhz input down converter to 300-400Mhz.

图传下变频器中国深圳供应商， 频率定制

名称: 图传下变频器
型号: LWDC-248258I
编号: 1805001
RF +12V IF
이름: RF 다운 컨버터
모델: LWDC-3000I
모델: LWDC-1400
Frequency input 2G~2.7G(2000~2700Mhz)
낮추다: 1800MHz의
Frequency output: 200Mhz-700Mhz
SN2405002

	MIN	TYPE	최대
작동 주파수 대역 (메가 헤르츠)	1300	–	1400	工作频段 （MHz)
국부 발진기 (메가 헤르츠)		1000		本振（MHz)
Intermediate frequency (메가 헤르츠)	300	–	400	中频（MHz)
Conversion gain Gain(데시벨)	18	20	22	变频增益Gain(데시벨)
Gain Flatness (데시벨)		±1	–	增益平坦度(dB）
Noise figure (데시벨)		1.5	–	噪声系数(dB）
Port Standing Wave Ratio VSWR	1.5	1.8	2	端口驻波比VSWR
Port Impedance(옴)		50	–	端口阻抗(옴)
최대 입력 전력 (dBm)		-5		最大输入功率（dBm）
Maximum output power (dBm)		15		最大输出功率（dBm)
작동 전압 (V)	10	12	15	工作电压（V)
작동 전류 (엄마)	130	150	180	工作电流（mA）
작동 온도 (℃)	-25		55	工作温度（°C)
보관온도 (℃)	-45		65	存储温度（C)
Dimension mm (without connectors)		62x32x14mm		尺寸 mm (不含连接器)

Customize Frequency Specification Sheet Download

OF 1750Mhz Down

목	매개 변수
input frequency	2100 MHz ～2500 MHz
출력 주파수	350 MHz ～750 MHz
Local frequency	1750 메가 헤르츠
잡음 지수	≤1.5dB
얻다	15 데시벨
Carrier leakage	≤-20dBm
Belt unevenness(8메가 헤르츠)	≤1.5dB
IIP3:	≥15dBm
maximum input level	0dBm
VSWR	≤1.5
operation temperature	-10～+60℃
voltage current	≤12V/240mA
RF 인터페이스	N-50KFD
크기	108*48*22mm
Power supply mode	Online power supply