21AP10 Ultra HD Smart Network Video Recorder SoC

General Introduction

• 21AP10 is a professional ultra-high-definition smart network video recorder SoC launched for the market. The chip supports up to four sensor inputs, 4K60 ISP image processing capabilities, 3F WDR, multi-level noise reduction, six-axis anti-shake, hardware splicing, and other image enhancement and processing algorithms, providing users with excellent images. Processing power.
• 21AP10 has a built-in quad-core A55, providing efficient, rich, and flexible CPU resources to meet customer computing and control needs—integrated single-core MCU to meet certain scenarios with high low-latency requirements.
• 21AP10 integrates an efficient image analysis tools inference unit, up to 10.4Tops INT8, and supports the industry mainstream image analysis tools frame. It also has a built-in dual-core Vision DSP to meet some of the customers’ differentiated CV calculation needs.
• 21AP10 adopts an advanced 12nm low-power process and 0.65pitch package, and supports LPDDR4/LPDDR4x/DDR4 particles to meet the product miniaturization design and rapid mass production of customer applications.
• The stable and easy-to-use SDK design provided by 21AP10 can support customers’ rapid product mass production.

Ezaugarri nagusiak

• Intelligent acceleration:
  • 10.4Tops INT8 dual NN acceleration engine
  • DSP processing of dual-core Vision Q6
• 4K60 codec:
  • Supports 4K60 H.265/H.264 encoding
  • – euskarri 10 channels of 1080p30 H.265/H.264 decoding.
• Support 4-way 4M real-time splicing: Supports 4-channel 4Mp30 in-camera real-time hardening splicing.
• High-speed interface: Supports USB3.0 and PCIe2.0 high-speed interfaces.
• Small package: Adopts 23mm x 23mm FC-BGA package.

Main Feature

processor core

• Quad-core ARM Cortex [email protected]
  • − 32KB I-Cache，32KB D-Cache /512KB L3 cache
  • − Supports Neon acceleration and integrates FPU processing unit● Built-in 32bit MCU@500MHz
  • − 32KB I-Cache，32KB D-Cache /64KB TCM
  • Support Trust Zone

Intelligent video analysis

• Image analysis Acceleration engine, up to 10.4Tops@INT8 computing power
  • Dual-core heterogeneous engine
  • Motorra 1: supports 4.8Tops computing power, supports INT4/INT8/FP16
  • Motorra 2: supports 5.6Tops computing power and INT8/INT16−
  • Supports complete API and tool chain, easy for customer development
• Dual-core Vision Q6 DSP
  • 32K I-Cache /32K D-Cache /32K
  • IRAM/320K DRAM
• Built-in intelligent computing acceleration engine
• Built-in binocular depth acceleration unit
• Built-in matrix calculation acceleration unit

Video codec

• H.264 BP/MP/HP
• H.265 Main Profile
• H.264/H.265 codec maximum resolution is 8192 x 8192
• H.264/H.265 encoding supports I/P frames
• H.264/H.265 multi-stream encoding capabilities:
  • 3840 x 2160@60fps + 1280×720@30fps
  • 7680 x 4320@15fps
• H.264/H.265/MPEG-4 multi-stream decoding capability:
  • 3840 x 2160@60fps + 1920×1080@60fps
• Supports pre-encoding OSD overlays for up to 8 regions
• Supports multiple rate control modes such as CBR/VBR/AVBR/FIXQP/QPMAP
• Maximum output bit rate 160Mbps
• euskarri 8 Regions of Interest (ROI) kodeketa
• Support JPEG Baseline codec
• JPEG codec maximum resolution 16384×16384
• JPEG maximum performance
  • Encoding: 3840 x 2160@60fps (YUV420)
  • Deskodetzea: 3840 x 2160@75fps (YUV420)

Video sarrerako interfaze

• Support 8-Lane image sensor serial input, support MIPI/LVDS/Sub-LVDS/HiSPi multiple interfaces
• Supports various combinations such as 2×4-Lane or 4×2-Lane, and supports up to 4 sensor serial inputs
• Maximum resolution 8192 x 8192
• euskarri 8/10/12/14 Bit RGB Bayer DC timing video input, clock frequency up to 150MHz
• Support BT.601, BT.656, BT.1120 video input interface
• Supports mainstream CMOS-level thermal imaging sensors

Digital Image Processing (ISP)

• ISP supports time-division multiplexing to process multiple sensor input videos
• Supports 3A (AE/AWB/AF) funtzio, 3A control is user-adjustable
• Supports fixed pattern noise (FPN) removal
• Supports dead pixel correction and lens shadow correction;
• Supports up to three frames of WDR and Advanced Local Tone Mapping
• Supports multi-level 3D denoising, image edge enhancement, defogging, dynamic contrast enhancement and other processing functions
• Support 3D-LUT color adjustment
• Support lens distortion correction and fisheye correction
• Supports 6-DoF digital image stabilization and Rolling-Shutter correction
• Support image Mirror, Irauli, 90 degree/270 degree rotation
• Provide PC-side ISP adjustment tools
• Supports super-sensitive noise reduction (HNR)

Video and graphics processing

• Supports graphics and images 1/15.5~16x zoom function
• Supports up to 4-channel video panoramic stitching
  • Sarrerako 2 channels 3840×2160, output 4320×3840
  • Sarrerako 4 channels 2688×1520, output 6080×2688
• Supports video layer and graphics layer overlay
• Support color space conversion

bideo irteera

• Support HDMI2.0 interface output
• Support 4-Lane Mipi DSI/CSI interface output, up to 2.5Gbps/lane
• Built-in analog SD CVBS output
• Laguntzarako 8/16/24 bit RGB, BT.656, BT.1120 and other digital interfaces
• euskarri 2 independent HD video outputs simultaneously
  • − Support non-source output of any two interfaces
  • − One of the channels can support PIP (Picture In Picture)
• Maximum output capacity 4096×2160@60fps + 1920×1080@60fps

Audio interface and processing

• Built-in Audio codec, supports 16bit voice input and output
• Support I2S interface
• Supports multi-channel time division multiplexing transmission mode (TDM)
• Support HDMI Audio output
• Multi-protocol voice encoding and decoding through software
• Support audio 3A (AEC/ANR/ALC) prozesatzeko
• Support G.711/G.726/AAC/etc. audio encoding formats

Safe Isolation and Engine

• Support secure boot
• Supports Trust Zone-based REE/TEE hardware isolation solution
• Hardware implementation of AES symmetric encryption algorithm
• Hardware implementation of RSA2048/3072/4096 signature verification algorithm
• Hardware implements HASH-based SHA/256/384/512 and HMAC_SHA256/384/512 algorithms
• Hardware implementation of random number generator
• Integrated 30Kbit OTP storage space for customer use

Network Interface

• 2 Gigabit Ethernet interfaces
  • Supports RGMII and RMII interface modes
  • Supports TSO, UFO, COE, and other acceleration units
  • Support Jumbo Frame

Peripheral interface

• Supports power-on reset (POR) and external input reset
• Integrated 4-channel LSADC
• Multiple UART, I²C, SPI, GPIO interfazea
• 2 SDIO3.0 interfaces
  • SDIO0 supports SDXC card, maximum capacity 2TB
  • SDIO1 supports the docking wifi module
• 2 USB3.0/USB2.0 interfaces
  • USB0 Host interface only
  • USB1 Host/Device switchable
• 2-Lane PCIe2.0 high-speed interface
  • Support RC/EP mode
  • Configurable as 2-Lane PCIe2.0
  • Configurable as 1-Lane PCIe2.0 + USB3.0

External memory interface

• ● DDR4/LPDDR4/LPDDR4x interface
  • Laguntzarako 4 x 16bit DDR4
  • Laguntzarako 2 x 32bit LPDDR4/LPDDR4x
  • DDR4 maximum speed 3200Mbps
  • LPDDR4/LPDDR4x maximum rate 3733Mbps
  • Maximum capacity 8GB
• SPI Nor/SPI Nand Flash interface
  • Laguntzarako 1, 2, 4-wire mode
  • SPI Nor Flash supports 3Byte and 4Byte address modes
• NAND Flash interface
  • Support SLC, MLC asynchronous interface devices
  • Supports 2/4/8/16KB page size
  • Support 8/16/24/28/40/64bit ECC (in 1KB units)
• eMMC5.1 interface, maximum capacity 2TB
• Choose from eMMC, SPI Nor/SPI Nand Flash,
• NAND Flash or PCIe boot from chip

SDK

• Arm CPU supports Linux SMP
• DSP/MCU supports LiteOS

Chip physical specifications

• Energia-kontsumoa
  • 5.2W typical power consumption (4K30 + 4Tops)
• Tentsio eragileak
  • The core voltage is 0.8V
  • IO voltage is 1.8/3.3V
  • DDR4/LPDDR4/LPDDR4x interface voltage is 1.2/1.1/0.6V respectively
• Package form
  • Ibilgailuen babeskopiko kamerak alarma mota, FC-BGA 23mm x 23mm package
  • Pin spacing: 0.65mm

Bloke funtzionalaren diagrama

Acronyms and Abbreviations

3DNR three-dimensional noise reduction
AAC advanced audio coding
AE automatic exposure
AEC acoustic echo control
AES advanced encryption standard
AF automatic focus
ALC automatic level control
ANR adaptive noise reduction
API application programming interface
AVBR adaptive variable bit rate
AVS any view stitching
AWB automatic white balance
CAC chromatic aberration correction
CBR constant bit rate
CMOS complementary metal-oxide-semiconductor
CV computer vision
codec coder/decoder
CSI camera serial interface
DC digital camera
DCI dynamic contrast improvement
DDR double data rate
DDRC double data rate controller
DIS digital image stabilization
DPU depth processing unit
DSI display serial interface
DSP digital signal processor
ECC error-correcting code
eMMC embedded multimedia card
EP endpoint
FCCSP flip-chip chip scale package
FPN fixed pattern noise
FPU floating-point unit
GE gigabit Ethernet
GMAC Gigabit Ethernet Media Access Controller
GPIO general-purpose input/output
GUI graphical user interface
HD high definition
HiSPI high-speed serial pixel interface
I 2 C inter-integrated circuit
I 2 S inter-IC sound
ISP image signal processor
IVE intelligent video engine
LCD liquid crystal display
LGDC lens geometric distortion correction
LPDDR low-power double data rate
LSADC low-speed analog-to-digital converter
LUT lookup table
LVDS low-voltage differential signaling
MAU matrix arithmetic unit
MCU microcontroller unit
MIC microphone
MIPI mobile industry processor interface
NR noise reduction
OSD on-screen display
OTP one-time programming
PCIe peripheral component interconnect express
PIP picture-in-picture
POR power-on reset
PWM pulse-width modulation
RAM random access memory
RC root complex
RGB red-green-blue
RGMII reduced gigabit media-independent interface
RMII reduced media-independent interface
RoHS restriction of hazardous substances
ROI region of interest
RSA Rivest-Shamir-Adleman
RNG random number generator
SD secure digital
SDIO secure digital input/output
SDK software development kit
SDRAM synchronous dynamic random access memory
SDXC secure digital extended capacity
SMP symmetric multiprocessing
SoC system-on-chip
SPI serial peripheral interface
TDM time division multiplexing
TOPS Tera Operations Per Second
TSO TCP segmentation offload
TX transmit
UART universal asynchronous receiver transmitter
USB Universal Serial Bus
VBR variable bit rate
VI video input
VO video output
VQE voice quality enhancement
WDR wide dynamic range